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Component redesign

Obsolete components

ID MOS offers a complete alternate way to replace obsolete digital, analog or mixed-signal integrated circuits. The methodology is based on a cloning of the original component on a currently available silicon process, replicating the same form-factor and pin out as well as all electrical characteristics and functionality.

Cost and performance optimisation

The replacement of stable content FPGAs by their ASIC equivalent is THE solution to reduce an electronic board’s manufacturing cost.

The original source code in VHDL or Verilog being independent from the technology, a targeting to ASIC is quite straight forward. While the flexibility of the FPGA is an advantage during the development or pre-series period, the high unit price becomes a drawback when the product ramps up to more important volumes.

The replacement of one or more FPGA by a digital ASIC may reduce significantly the unit cost and mitigate the obsolescence risk. The combination of several FPGAs on one single ASIC may offer on top improvements linked to a better integration: reliability, consumption, board assembly cost.

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