|
Based
on
a PC, EMErald(R) ICE allows all companies to access to system-on-chip
(SOC) without changing the design team structure, the major time
consuming tasks are developed in parallel therefore reducing
the NRE cost and the time-to-market.
EMerald
is an essential validation step for an ASIC development flow :
|
| Advantages: |
|
| ·
Micro-controller
based applications prototype approach
·
Secure
schedules and risks
·
Time
to market reduction
·
Software
validation
·
Design
re-use approach
|
| Architecture: |
|
| EMerald
includes three main parts:
THE
HARDWARE PLATFORM: Based on FPGA |
| 
Generic
External box
|
|
|
Independent PC Interface |
·
ISA
Interface
·
USB
Interface
·
RS232
Interface (on request)
|
THE
SOFTWARE TOOLKIT
Fully
integrated development system providing advanced support software
for emulated microprocessor cores and kit parts. |
|
Architecture validation
Customizable de-bug tool : It provides on-line view of Registers,
RAM, ROM, assembler, C source
C-Compiler
(Keil Compatible)
Assembler-linker
A Logic Analyzer, which facilitates in-depth tracing and debugging
Automatic
VHDL based ASIC Netlist generation.
|
| THE
LIBRARY
Universal Pre-designed IP blocks are included helping system engineers
to fix the architecture.
Identical VHDL description for FPGA and ASIC digital functions.
Design re-use approach provides the possibility to the customer
to include itself: |
| |
·
Application
specific micro-controller
·
Previous
development down by the customer
·
Specific
IPs |
